TMDXEVM5515【PDF 59/159 页】EVAL MODULE DSP FOR C55XX

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SPRS645F – AUGUST 2010 – REVISED OCTOBER 2013

Table 3-5. EBSR Register Bit Descriptions (continued)

BIT

11:10

9:8

7

6

5

4

3

2

1

0

NAME

SP1MODE

SP0MODE

RESERVED

RESERVED

A20_MODE

A19_MODE

A18_MODE

A17_MODE

A16_MODE

A15_MODE

DESCRIPTION

Serial Port 1 Mode Control Bits. The bits control the pin multiplexing of the MMC1, I2S1, and GPIO

pins on serial port 1. For more details, see Table 3-7 , MMC1, I2S1 , and GP[11:6] Pin Multiplexing .

00 = Mode 0 (MMC/SD1). All 6 signals of the MMC/SD1 module are routed to the 6 external signals

of the serial port 1.

01 = Mode 1 (I2S1 and GP[11:10]). 4 signals of the I2S1 module and 2 GP[11:10] signals are

routed to the 6 external signals of the serial port 1.

10 = Mode 2 (GP[11:6]). 6 GPIO signals (GP[11:6]) are routed to the 6 external signals of the serial

port 1.

11 = Reserved.

Serial Port 0 Mode Control Bits. The bits control the pin multiplexing of the MMC0, I2S0, and GPIO

pins on serial port 0. For more details, see Section 3.7.1.3 , MMC0, I2S0, and GP[5:0] Pin

Multiplexing .

00 = Mode 0 (MMC/SD0). All 6 signals of the MMC/SD0 module are routed to the 6 external signals

of the serial port 0.

01 = Mode 1 (I2S0 and GP[5:0]). 4 signals of the I2S0 module and 2 GP[5:4] signals are routed to

the 6 external signals of the serial port 0.

10 = Mode 2 (GP[5:0]). 6 GPIO signals (GP[5:0]) are routed to the 6 external signals of the serial

port 0.

11 = Reserved.

Reserved. Read-only, writes have no effect.

Reserved. Read-only, writes have no effect.

A20 Pin Mode Bit. This bit controls the pin multiplexing of the EMIF address 20 (EM_A[20]) and

general-purpose input/output pin 26 (GP[26]) pin functions.

0 = Pin function is EMIF address pin 20 (EM_A[20]).

1 = Pin function is general-purpose input/output pin 26 (GP[26]).

A19 Pin Mode Bit. This bit controls the pin multiplexing of the EMIF address 19 (EM_A[19]) and

general-purpose input/output pin 25 (GP[25]) pin functions.

0 = Pin function is EMIF address pin 19 (EM_A[19]).

1 = Pin function is general-purpose input/output pin 25 (GP[25]).

A18 Pin Mode Bit. This bit controls the pin multiplexing of the EMIF address 18 (EM_A[18]) and

general-purpose input/output pin 24 (GP[24]) pin functions.

0 = Pin function is EMIF address pin 18 (EM_A[18]).

1 = Pin function is general-purpose input/output pin 24 (GP[24]).

A17 Pin Mode Bit. This bit controls the pin multiplexing of the EMIF address 17 (EM_A[17]) and

general-purpose input/output pin 23 (GP[23]) pin functions. For more details, see Table 3-8 ,

EM_A[20:16] and GP[26:21] Pin Multiplexing .

0 = Pin function is EMIF address pin 17 (EM_A[17]).

1 = Pin function is general-purpose input/output pin 23 (GP[23]).

A16 Pin Mode Bit. This bit controls the pin multiplexing of the EMIF address 16 (EM_A[16]) and

general-purpose input/output pin 22 (GP[22]) pin functions. For more details, see Table 3-8 ,

EM_A[20:16] and GP[26:21] Pin Multiplexing .

0 = Pin function is EMIF address pin 16 (EM_A[16]).

1 = Pin function is general-purpose input/output pin 22 (GP[22]).

A15 Pin Mode Bit. This bit controls the pin multiplexing of the EMIF address 15 (EM_A[15]) and

general-purpose input/output pin 21 (GP[21]) pin functions. For more details, see Table 3-8 ,

EM_A[20:16] and GP[26:21] Pin Multiplexing .

0 = Pin function is EMIF address pin 15 (EM_A[15]).

1 = Pin function is general-purpose input/output pin 21 (GP[21]).

3.6.2

LDO Control Register [7004h]

When the DSP_LDO is enabled by the DSP_LDO_EN pin [D12], by default, the DSP_LDOO voltage is set

to 1.3 V. The DSP_LDOO voltage can be programmed to be either 1.05 V or 1.3 V via the DSP_LDO_V

bit (bit 1) in the LDO Control Register (LDOCNTL).

At reset, the USB_LDO is turned off. The USB_LDO can be enabled via the USBLDOEN bit (bit 0) in the

LDOCNTL register.

For more detailed information on the LDOs, see Section 3.2.1 LDO Configuration .

Copyright ? 2010–2013, Texas Instruments Incorporated

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